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dt-code-sequ [2012/06/11 10:35] beckmanf concurrent flipflop |
dt-code-sequ [2014/01/08 11:02] (current) beckmanf flipflop process -> concurrent |
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begin | begin | ||
- | ff_p : process(clk, reset_n)Ìý | + | q <= '0' when reset_n = '0' else new_q when rising_edge(clk); |
- | ²ú±ð²µ¾±²ÔÌý | + | |
- | if reset_n = '0' ³Ù³ó±ð²ÔÌý | + | |
- | q <= '0';Ìý | + | |
- | elsif rising_edge(clk) ³Ù³ó±ð²ÔÌý | + | |
- | q <= new_q; Ìý | + | |
- | end if;Ìý | + | |
- | end process ff_p; | + | |
new_q <= not q; | new_q <= not q; | ||
- | end; | + | end architecture rtl; |
</code> | </code> | ||
Line 97: | Line 90: | ||
entity strangecnt is | entity strangecnt is | ||
port ( | port ( | ||
- | clk_i : in std_ulogic;Ìý | + | clk : in std_ulogic;Ìý |
- | reset_ni : in std_ulogic; | + | rst_n : in std_ulogic; |
s_i : in std_ulogic; | s_i : in std_ulogic; | ||
cnt0_o : out std_ulogic; | cnt0_o : out std_ulogic; | ||
Line 109: | Line 102: | ||
signal l : std_ulogic; | signal l : std_ulogic; | ||
begin | begin | ||
- | seq_p : process(clk_i, reset_ni)Ìý | + | Ìý |
- | ²ú±ð²µ¾±²ÔÌý | + | c0 <= '0' when rst_n = '0' else c0_new when rising_edge(clk); Ìý |
- | if reset_ni = '0' ³Ù³ó±ð²ÔÌý | + | c1 <= '0' when rst_n = '0' else c1_new when rising_edge(clk); |
- | c0 <= '0';Ìý | + | |
- | c1 <= '0'; Ìý | + | |
- | elsif rising_edge(clk_i) ³Ù³ó±ð²ÔÌý | + | |
- | c0 <= c0_new;Ìý | + | |
- | c1 <= c1_new; Ìý | + | |
- | end if;Ìý | + | |
- | end process seq_p; | + | |
c0_new <= not c0; | c0_new <= not c0; |